Qorvo PAC55712
72 V BLDC Controller and Driver with Integrated Multimode Power Manager and Configurable AFE with VDS sensing – extended I/O
- 150 MHz Arm Cortex M4F
- 128 kB Flash, 32 kB SRAM
- 70 V Buck/SEPIC DC/DC Controller with external NCH FET
- 5 V / 200 mA system supply
- 3 High-side 70 V 1.2 A (source)/1.8 A (sink) gate drivers
- 3 Low-side 20 V 1.2 A (source)/1.8 A (sink) gate drivers
- VDS Sensing
- Advanced Cycle-by-Cycle Protection
- 3 x Differential PGA (x1 to x48)
- 4 x Single PGA (x1 to x48)
- Programmable over-current shut-down
- Programmable comparator hysteresis and blanking
- Simultaneous Sample and Hold for 3 cycles
Qorvo’s PAC55712 expands Qorvo’s broad portfolio of full-featured Power Application Controller® (PAC) products – highly optimized System On Chip (SOC) for controlling and powering next generation smart energy appliances, devices, and equipment – by adding new features such as Cycle By Cycle (CBC), Enhanced Sample And Hold (S&H), Windowed Watchdog Timer, and Vds Sensing for added safety.
This application controller integrates a 150 MHz Arm® Cortex®-M4F 32-bit microcontroller core with Qorvo’s proprietary and patent-pending Multi-Mode Power Manager™, Configurable Analog Front End™, and Application Specific Power Drivers™ to form the most compact microcontroller-based power and general purpose application systems.
The product’s microcontroller features up to 128 kB of embedded FLASH and 32 kB of SRAM memory, a high-speed 12-bit 2.5 MSPS analog-to-digital converter (ADC) with dual auto-sampling sequencers, 5 V/3.3 V I/Os, flexible clock sources, timers, a versatile 14-channel PWM engine, and several serial interfaces.
| Power Supply Input Voltage(V) | 5.2 to 72 |
| Power Supply Topology | 72 V Buck |
| Gate Drivers (High-Side) | 3 @ 72 V – 1.2 A Source / 1.8 A Sink |
| Gate Drivers (Low-Side) | 3 @ 20 V – 1.2 A Source / 1.8 A Sink |
| Microcontroller | 150 MHz ARM® Cortex®-M4F |
| MCU Flash(KB) | 128 |
| MCU SRAM(KB) | 32 |
| MCU ADC | 12-bit 2.5 MSPS SAR |
| MCU GPIOs | 30 Digital GPIOs (3.3 V tolerant) + 10 AIOx GPIOs |
| MCU PWMs | 31 |
| Serial Interfaces | UART/SPI, I2C, CAN |
| Signal Chain Diff Amps | 3 |
| Signal Chain Single Amps | 4 |
| Signal Chain ADC Channels | 14 |
| Package Type | TQFN, 64-pin |
| Package(mm) | 8.0 x 8.0 |
| RoHS | Yes |
| Lead Free | Yes |
| Halogen Free | Yes |
| ITAR Restricted | No |
| ECCN | EAR99 |
Data Sheets: Product Data Sheet – Rev 1.0 – 06/11/2024
Application Notes: PAC55xx PCB Design and Layout Guidelines – Rev 1.2 – 06/30/2019
PCB Layout Guidelines for QFN Package (AN-104)– Rev 9.0 – 12/10/2018
CAD Layout Files: PCB Symbol, Footprint & 3D Model (provided by SamacSys)
User Guides: Device User Guide. PAC55xx Family User Guide – Rev 1.33 – 01/28/2021
Courtesy of Qorvo
